FRESHER: Trained RTL Design Engineers ( FPGA, Design, Verilog, VHDL, Altera, Xilinx )

Job Overview

Location
Bengaluru, Karnataka
Job Type
Full Time
Date Posted
3 years ago

Additional Details

Job ID
195
Job Views
129

Job Description

Job Description:

FPGA design using Verilog/VHDL

Should have good knowledge of design concepts

Very good in coding and time analysis

Should have worked on Altera/Xilinx Tools


Location: Bengaluru, Hyderabad


No of Positions : 50

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